Intel die sizes: Coffee Lake, Comet Lake, and Ice Lake

Intel, for whatever reason, has seen fit to stop publishing die sizes and transistor counts (estimates) on it's latest CPUs. It's a strange move, probably driven by the company's difficulties with getting high-end 10nm parts out the door. Sure, Ice Lake now exists and is readily available, but 10nm was at least three years late. But I digress.

I really just wanted to gather all the die size information I had into one place, for ease of reference. Transistor counts could be estimated, but the density varies depending on what sort of logic is in use (cache, branch predictor, etc.) so I'm not going to even try. But here are the current die sizes, based on physical chip measurements (which are accurate to within probably 2%):

These first three come courtesy of der8auer, who routinely delids CPUs. (Links to Amazon earn me affiliate commissions.)

Core i7-8700K die size: 9.2 x 16.7 mm ~= 153.6 mm2

Core i9-9900K die size: 9.2 x 19.6 mm ~= 180.3 mm2

Core i9-10900K die size: 9.2 x 22.4 mm ~= 206.1 mm2

What about Ice Lake? As with recent Intel U-series processors, the package has two chips. The smaller is the platform controller hub (PCH) while the larger represents the main Ice Lake CPU. I've seen earlier estimates based on the Ice Lake wafer that the die size was around 130 mm2. However, using the package shots it's actually smaller than that.

Ice Lake / Core i7-1065G7 die size: 11.40 x 10.78 mm ~= 122.9 mm2

Ice Lake PCH die size: 5.74 x 9.42 mm ~= 54.1 mm2

Intel does have plans to release server variants of Ice Lake, which presumably means yields are good enough that it can actually manufacture larger chips. But how big would such a chip be?

The current 123 mm2 Ice Lake chips have a rather large GPU cluster that wouldn't be needed for servers. In fact, the 4-core CPU cluster only occupies about a quarter of the entire die space right now, with other portions used for the DDR4 memory controller, system agent, and GPU.

To be more precise, the CPU cores and ring bus use about 26.5% of the die area. The Gen11 graphics is about one third (33.6%) of the die space, the DDR4 controller is only 6.3% of the die, and the system agent makes up the remaining 33.6% of the die.

So if Intel wanted to make, for example, a 32-core Ice Lake server part using the same size Sunny Cove cores, with an 8-channel memory interface, it wouldn't even need to be that big of a chip. Oh, it would be much larger than the current Ice Lake-U CPU+GPU's 123 mm2, but as a rough estimate, Intel could do 32-core Ice Lake with a die size of about 375 mm2. Piece of cake! And only two years late compared to the competition.

Intel Skylake-X and Cascade Lake-X Die Sizes

I'm going to keep this fairly simple, but I figure if I couldn't easily find this information, others are probably looking for it as well. Basically, Intel never gave out information on the die size of it's Skylake-X and later Cascade Lake-X CPUs. The best way to get a reasonable estimate of die size is from shots where extreme overclockers and enthusiasts have delidded the chips. I've gathered what I could find out there to come up with the following data.

There are three variants of Skylake-X (SKL-X) and Cascade Lake-X (CSL-X). While CSL-X chips do have some minor changes to the underlying design (like hardware mitigations of some side-channel attacks), fundamentally not much has changed. So the following should apply to all chips of each family.

The LCC (Low Core Count) variety of Skylake-X has up to 10 cores. This is the die used in Core i9-7900X, Core i9-9900X, and Core i9-10900X. It's also used in the Core i7-7800X, Core i7-7820X, Core i7-9800X, and Core i9-9820X.

HCC (High Core Count) Skylake-X CPUs have anywhere from 12 to 18 cores. These chips (not counting Xeon models) consist of the Core i9-7920X, Core i9-7940X, Core i9-7960X, Core i9-7980XE, Core i9-9920X, Core i9-9940X, Core i9-9960X, and Core i9-9980XE from the Skylake-X family, and the Core i9-10920X, Core i9-10940X, and Core i9-10980XE from the Cascade Lake-X family.

Finally, the XCC (Extreme Core Count) models have 20 to 28 cores. These are used exclusively in Xeon chips -- they're not intended for enthusiasts. Of course there is the Xeon W-3175X "enthusiast" chip that has the full 28 cores, but at $3,000 I'm pretty sure no one bought it for gaming purposes.

But the question I had is: what are the actual die sizes of these various chips? So I did some sleuthing and came up with the following.

First, GamersNexus has some nice shots of a delidded Core i9-7900X next to a ruler. The measurements show a size of approximately 24.5 x 14 mm, giving a final die size of 343mm square. That's the easy one and you can find quite a few other places with pictures and estimates of die size. It's probably accurate to within 1-2%, which is fine since transistor counts are probably estimated in a similar fashion.

Skylake-X LCC Die Size: ~343 mm square

Stepping up to the HCC chip, not many people delidded that one. I found this thread on Overclockers where user batboy delidded his Core i9-7920X, and der8auer also delidded an i9-7920X. We do know the package size for all the Skylake-X chips (it's officially 52.5 x 45 mm, which is accurate to within ~0.25mm I assume). Using that and the delidded images, I estimated die size.

The der8auer image is better for this, and gives a package width of 684 pixels and a die width of 344 pixels, with a package height of 787 pixels and a chip height of 329 pixels. Using simple math, that works out to a die size of about 22.6 x 21.9 mm, or 495 mm square (plus or minus 5 mm square).

Skylake-X HCC Die Size: ~495 mm square

Finally, the Skylake-X XCC die is a bit harder to find, but der8auer comes through again with a video where he delidded and overclocked the $3000 W-3175X. Not that he paid for the chip, but still. Anyway, I've grabbed a shot after the delidding, adjusted the angles a bit to make it easier, and used information on the LGA3647 package size to arrive at the actual die size.

The image shows a width of 763 pixels for the package and 216 for the die width, with a package height of 538 pixels and a die height of 302 pixels. Crunching the numbers, that gives a final die size of approximately 21.7 x 31.7 mm.

Skylake-X XCC Die Size: ~688 mm square

Obviously there's still a bit of wiggle room, but the above is about as good of an estimate as I can provide. Equally obvious: Skylake-X is a big CPU in its LCC incarnation, and even bigger at HCC. Around 500mm square in size is one of the larger CPUs Intel has made. And of course, it can't hold a candle to the XCC die size of nearly 700mm square.

My real question: Just how big will Intel's Xe Graphics HPC variant be? That wafer shot from Raja, along with some of the things IntelGraphics has tweeted, suggests it will be the biggest chip Intel has ever made. And yes, it's going to be very expensive -- even more than Xeon XCC CPUs I'd wager.